Method of and apparatus for electronically obtaining the argument of a complex function

ABSTRACT

A method and apparatus are disclosed for precisely recovering the arbitrary argument of an output signal from a transducer having a sinusoidal transfer characteristic. The respective function values of the transducer output are continuously compared with a sinusoidally varying reference voltage of known angular frequency and amplitude. The angular frequency of the reference voltage is set sufficiently high so that the value of the transducer output signal does not change appreciably during a cycle of the reference voltage. The amplitude of the reference voltage is made equal to the maximum possible amplitude of the transducer output signal. From this comparison is derived electronically a pulse-width modulated signal, the width of each pulse being determined by the interval between two points in time at which amplitude equality occurs between the transducer output and the reference voltage during each half-cycle of the reference voltage.

United States Patent Mottier et al.

[15] 3,678,399 [451 July 18,1972

[ METHOD OF AND APPARATUS FOR ELECTRONICALLY OBTAINING THE ARGUMENT OF A COMPLEX FUNCTION [72] Inventors: Francois Mottier, Zurich; Peter J. Wild,

Wettingen, both of Switzerland [73] Assignee: Brown, Boveri & Company Ltd., Baden,

Switzerland [22] Filed: Jan. 20, 1971 [21] Appl. No.: 108,078

[ 30] I Foreign Application Priority Data Jan. 22, 1970 Switzerland ..868/70 [52] U.S. Cl... ..328/l34, 328/147 3,235,800 2/1966 Turrell ..328/l34X 3,521,173 7/1970 Farley ..328/l34 Primary Examiner-John S. l-leyman Attorney-Norman F. Oblon, Stanley P. Fisher, Marvin J. Spivak and C. Irvin McClelland [57] ABSTRACT A method and apparatus are disclosed for precisely recovering the arbitrary argument of an output signal from a transducer having a sinusoidal transfer characteristic. The respective function values of the transducer output are continuously compared with a sinusoidally varying reference voltage of known angular frequency and amplitude. The angular frequency of the reference voltage is set sufiiciently high so that the value of the transducer output signal does not change appreciably during a cycle of the reference voltage. The amplitude of the reference voltage is made equal to the maximum possible amplitude of the transducer output signal. From this comparison is derived electronically a pulse-width modulated signal, the width of each pulse being determined by the interval between two points in time at which amplitude equality occurs between the transducer output and the reference voltage during each half-cycle of the reference voltage.

13 Claims, 9 Drawing Figures Fig. lb

Fig.2

PATENTEnJuLwmz 8.678 399 saw u 0F 5 VI ZWZWZM PATENTEI] JUL 1 8 I972 SHEET 5 [1F 5' I I I l BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates generally to a method of and an apparatus for electrically obtaining the arguments of complex signals, and more particularly to a method of and an apparatus for electronically obtaining the argument of a complex signal at the output of a transducer with a sinusoidal transfer characteristic. By a transducer with a sinusoidal transfer characteristic is meant a device in which an input signal (t) is so varied that it appears at the output of the transducer as the argument of a cosine or sine function.

2. Description of the Prior Art Transducers having sinusoidal transfer characteristics are used, for example, in various optical measurement systems where an unknown argument 4 (t) is sought to be recovered by electronic processing of signals at the transducer output which have the form,

fl (1) (where K constant and (t) any continuous function of time). The function flt), or more specifically cosd (t), will be called hereafter a sinusoidal function for short, although the function in itself is naturally not sinusoidal in the proper sense if (t) is non-linear.

Signals of the above-mentioned type are obtained, for example, during the photo-electronic processing of interference fringes in interferometers based on the Michelson principle using moving mirrors (1. Opt. Soc. Am. 47 (1957), 1,097-l ,103, or while measuring current in extra high voltage transmission lines by means of a laser current transducer (IEEE J. ofQuant. El. Qe-2( l 966) 255-259) or in a particular type of interferometer disclosed in Swiss Pat. No. 433,065.

All methods and systems known so far for obtaining the argument of a complex function, as described above, have the disadvantage that they either do not require sufficient accuracy, sensitivity or resolution, or that they have a high energy consumption, or that they are only applicable over limited measuring ranges, or that the system output is non-linearly related to the argument to be recovered.

SUMMARY OF THE INVENTION Accordingly, one object of this invention is to provide a novel method for electronically obtaining the argument of a complex function.

Another object of this invention is to provide a novel appa'ratus for electronically obtaining the argument of a complex function.

Yet another object of this invention is to provide a highly accurate method and apparatus for obtaining the argument of a complex function which is applicable over a broad measuring range.

A still further object of the present invention is to provide an improved method and apparatus for obtaining the argument of a complex function which is the output of a transducer having a sinusoidal transfer characteristic.

Another object of this invention is to provide an improved method and apparatus for obtaining the argument of a complex function precisely, wherein ambiguities are eliminated on the basis of periodicity.

Briefly, these and other objects of the invention are achieved according to the invention in that by continuously comparing the function values of a transducer output with a sinusoidally varying reference voltage of known angular frequency and amplitude. The angular frequency of the reference voltage is selected so high that the function value of the transducer output signal remains virtually constant during a cycle of the reference voltage. The amplitude of the reference voltage is chosen equal to the maximum possible amplitude of the signal to be processed. During each half cycle of the reference voltage, comparators are used to generated pulses of widths equal to the time between instants at which the amplitude or the reference voltage is equal to the amplitude of transducer output.

The pulses are processed to recover directly and precisely from a signal, according to equation l the argument and the arc (t), respectively, of the sinusoidal function cos(t).

BRIEF DESCRIPTION OF THE DRAWINGS A more complete appreciation of the invention and many of the attendant advantages thereof will be readily obtained as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings wherein:

FIG. 1 is a graphical representation of two transducer transfer characteristics cos and simb, phase-shifted by 1r/2 with respect to one another, and further illustrating two different argument functions ,,(t) and (b, (t);

FIG. la is a graphical representation of two transducer output signals cos,,(t) and sin,,(t);

FIG. lb is a graphical representation of two transducer output signals cos (t) and sin (t);

FIG. 2 is a graphical representation of a comparison of a function value sin() at time 1' with a reference voltage sin(wt);

FIG. 3 is a three-part graphical representation of the input functions cos(r) and sin(r) at time 1- in the range 0 1r/4 of the coordinate system of FIG. 1, with the reference function sin(t), where the ordinate is displaced by one unit (top of figure), with derived time-modulated pulses of normalized amplitude (lower portions of figure);

FIG. 4 is a block diagram of an apparatus for recovering the argument (t) of input signals 1 sinqS and l cos entering on two channels;

FIG. 5 is a detailed logic diagram of the combinatorial circuit LG of FIG. 4;

FIG. 6 is a circuit diagram of the modified AND-gates of FIG. 5; and,

FIG. 7 shows a logic diagram of the gating circuit TK according to FIG. 4.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to the drawings wherein like reference numerals designate identical or corresponding parts throughout the several views, and more particularly to FIG. 1 thereof, it will be clear that the function cost can be considered as the transfer characteristic of a transducer having an input function (t). Since it is possible and also customary, for reasons of precision and advantageous further processing, to generate both the function cos(t), and also the function sin(t) in devices of the above described type, so that these two transducer output signals are in quadrature (FIGS. 1a and lb), two transfer characteristics cosda and simb, phaseshifted by 1r/2, are shown in FIG. I.

To facilitate understanding of the invention, two signals ,,(t) and (t) of different amplitudes are illustrated at the bottom of FIG. 1. After modulation through the transfer characteristics cosda and sinrb respectively, the signals produce the signals cos (t) and sin (z), and cos,,(t) and sin,,(t) illustrated in FIGS. la and 1b.

According to a first aspect of the invention, the sinusoidal transducer output signal [i.e., cosd (t) and/or sin,, (t)] is compared with a sinusoidal voltage of known amplitude and known angular frequency w. The amplitude of the reference voltage must be as closely as possible equal to the maximum amplitude [sin(d 1'r/+ n'1r)] of the transducer output signal, and preferably normalized to be of unit magnitude.

This comparison determines the instants t,, when amplitude equality exists between the reference signal and the signal to be processed, that is where these two waveforms intersect see FIG. 3. If the value of the function to be processed [for example sin(t)] does not change during a cycle of the reference voltage (sinwt), as assumed, the following relationship results:

sinwt sinwt sin(t sin(t sin('r) (2) An analogous equation applies to cosda. As is clear from reference to FIG. 2, the following relationship applies (M 17/2 cuAt/Z where At t t,. This, together with equation (2) yields:

(t) =7T/2 wAt/2 For cosqb one obtains correspondingly:

(r) =wAt/2 Note that a representation of the function sint in FIG. 2 as extending through the coordinate-origin, (and the subsequent derivation of the foregoing general relation) is possible, because a displacement of the abscissa by a certain phase angle results in an equal displacement of b, so that knowledge of the phase angle is not necessary.

By measuring the time interval At between the two points in time t and t occurring during each half cycle of the reference voltage, at which the amplitude of the reference voltage equals the amplitude of the signal to be processed, the argument (t) of the transducer output signal [sin(t) or cos(t) can thus be represented directly, taking into account, if necessary, a known multiple of 1r/2.

As shown in FIG. 3, the time interval At between the two points t and t and the time interval At between the points t, and 1 are represented by pulses S and C respectively, of normalized amplitude and width proportional to the time interval At and A! respectively. Pulse S of width At is derived from the function sinqb, and pulse C of the width At is derived from the function cosdz. The signals to be processed sinda and cosd at time 1' again appear as constant d-c voltage levels. In FIG. 3 the signals 1 cos and l sind; are shown instead of the signals cosd) and sind). This corresponds to the conditions prevailing in practice, as expressed equation (I). It means mathematically however, only a displacement of the ordinate by one unit, and electronically the addition of a known constant d-c voltage.

A particularly attractive solution for q5(t), according to the invention, can be described by reference to FIG. 3.

Since both the pulses S and the pulses C, are derived as explained above, it is possible to use either the 005d) or sinqS function for the comparison. This has a considerable advantage for measuring accuracy in that unprecisely defined measuring points 1,, t or 2 1 can be avoided. Unprecisely defined measuring points are obtained if the function to be discussed is at a point of low rate the reference of change when its amplitude equals that of function. Unprecisely defined measuring points are thus obtained, for example, according to FIG. 3 for the points of intersection of the function 1 sinwt with the function I cos(-r), while points of intersection of l sinwt with l sin('r), much better defined intersection points are obtained.

On the basis of the foregoing considerations it is clear that continuously well defined pulse widths for representing the function (t) may be obtained by selecting those pulses which are derived from the sinusoidal function sin ;b(t) or cos(r) with the lower absolute values in a particular time interval. This is illustrated in FIG. 1. The respective parts of the characteristics cos, sinda, actually used for the comparison are represented by solid lines, those parts that are not used, by broken lines.

Thus, the portions of the transducer characteristics used for the comparison depend on the range of d), the sinqS- or the c054:- characteristic according to the following rules:

FIG. 1 shows, for example, how the rising leg of sinda is used in region 11 between 1r/4 and +7'r/4 etc.

Another advantageous aspect of the invention resides in the fact that not only the pulses S and C, but also the logically inverted pulses Sand Care generated. These too are illustrated in FIG. 3. For the partial ranges with the limits 5, 1r/4 n- (1r/2 can thus be used optimal pulses can thus be used for the representation of (t), so that the amplitude of the reference function equals that of the function to be processed at point of high rate of change. As it can be seen, the above indicated limits correspond to the points where sind cos4 {2/2. This has the advantage that increasing pulse widths correspond to increasing values of the argument 11 and vice ver- Observing the foregoing considerations, and referring to FIG. 3, the following d-c voltage levels are obtained:

1 sind ('r) 7 I cos(r) (8) l (9) By means of (9) and an oscillator one generates l sind)! (10) Then to is chosen so high that the function values sin and cosd change very little within a period T =(21r/w), even for the fastest change of 6 to be expected.

Referring now to first comparator C having input signals of the form defined by equation (7) and (10), may be used to generate the signal S and its logical complementsSTwhere S 1 for (l sinqb) (1 +sinwt)]. Similarly, a second comparator Q having inputs of the form defined by equations (8) and (10) may be used to generate the corresponding C and 6. Similar considerations as discussed with regard to equations (4) and (5) are valid for the partial ranges ll, l2, l3, 14 in FIG. 1:

T 3 7T (of Cdt=1r+2( )=22'n' (l4) For other values of 4) there are corresponding formulas. Thus, 2(t) can be represented directly by integration of the binary signals S, S, C, Cor by measuring their time length A: taking into account additive multiples of 1r. Since difierent signals are used for the comparison in the various partial ranges, as pointed out above with reference to FIG. 1, the following conditions determinant for the measurement are obtained with the above equations l l) to 14) for the individual partial ranges:

By 8,, Q etc. are meant the signals S, C etc. integrated over a cycle of the reference function sin (wt) and multiplied by the known angular frequency a). For higher and lower values of 5 corresponding multiples of 211' are added.

For producing the electronic representation of 24 (t) according to the foregoing table, particularly if 2(t) varies by more than 1r, the transition from one partial range to the next may be detected by comparators with attached direction or polarity discriminators, and may be taken into account by addition or subtraction of 1r using a reversible counter, such as VRZ of FIG. 4.

A logic network for carrying out the signal processing method described above is shown in FIG. 4.

Referring again to FIG. 4a sinusoidal input voltage I -lsin( t) is fed to a first comparator C and a sinusoidal input voltage I -lcos (t) is fed to a second comparator C The reference voltage (1 sinwt), produced by a generator SG and a unit voltage source E the outputs of which are summed in a first adder A is also fed to both comparators C and C The comparators C C both have complementary outputs. The unit voltage S or C is generated at the outputs of the comparators C or C respectively, if (I sin) (l +sinwt), and if (I cos) (l +sinmt) respectively. In the opposite case voltage appears. At the outputs 6 the respective logically inverted or complement voltages are generated.

The outputs S, C, TS Gare fed into a combination gate TK which is so controlled by the combinatorial logic LG that only one of the outputs of the comparators C C is connected through to a second adder A The output signals of comparators C C C and C feed the combinatorial logic LG. The comparators C C, with outputs V 7, and V V compare the respective function values (I +sin) and (l +cosq5) with unit voltage 1. They thus determine the signs of sin and cosd: respectively.

The comparator C; with the outputs V 7;, compares the function value [I +sin(t)] with the fixed value [I y/Z/Z] and comparator C with the outputs V 7,, compares the value [1 -lsin (t)] with the fixed value [I 272]. When using the C054; channel, the appropriate corresponding constant voltages are used. The voltage value at the output V of the comparator C is thus I, if+1r/4 (t)i:N'21r 311/4. Correspondingly, the voltage value at the output V of comparator C is I, if 51r/4 (t) i n'21'r 71r/4. The combination of the outputs of C and C permits the identification of the boundaries ,,=1r/4 i NWT/2 according to FIG. 1. If(t) exceeds such a boundary, the output signal of either C or C,, will switch. The direction of switching of the logical output signal of Q, or C together with the identification of the boundary by C or C permits the logic circuit LG to determine whether (t) has passed through acertain boundary in an increasing or decreasing direction. If a boundary q), is passed in positive direction, the counter VRZ receives an incrementing pulse. In the opposite case a decrementing pulse is generated. One count thus corresponds to /2/ ='n-.

Incrementing pulses are generated for changes of range under the following conditions:

11 12 ;v,=1 v,=1,v,becomes1 (l2) (13): V: I, V2=0, V3 becomesO (13) (14): V,=0, V =0, V becomes 1 (I4) (I l): V,=0, V 1, V becomesO Decrementing pulses are generated for:

A more detailed illustration of the logic LG, satisfying the foregoing conditions I5 )-(22) is illustrated in FIG. 5:

The signals V V V and V and their logical complements V V V; and V form the comparators C C C and C are fed, as shown in FIG. 5, to NAND-gates l, 2, 3, 4 and to modified AND-gates 5, 6, 7, 8, 9, 10, 11 and 12, respectively.

The interconnections of the above mentioned NAND-gates, with the above-mentioned modified AND-gates are also clearly shown in FIG. 5.

The modified ANDgates 5 12 are designed so that, depending on the static voltage at one input, only voltage transients of a specified direction or polarity applied at the other input are transmitted.

The circuit of such a modified AND-gate is shown in FIG. 6. The gates 5 and 6 of FIG. 5 are indicated by y broken outlines. These gates have at one input a resistor (R R and at the other a capacitor (C C which are coupled to a diode (D D For the diode direction shown, only negative voltage transients at the capacitor inputs of the gates can be transmitted to the outputs, depending on the, voltages at the resistor inputs. Positive voltage transients at the capacitor inputs and and V car be detected selectively.

The logic network illustrated in FIG. 5 yields incrementing pulses according to the foregoing conditions (15) (18) through the gates 5 8, and decrementing pulses according to the conditions (19) (22) through the gates 9 12.

The outputs of the gates 5 8 are fed to an OR-gate 13, those of the gates 9 12 to an OR-gate 14. On the basis of the above described circuits for the AND-gates 5 12, these OR- gates can be implemented by simply connecting the AND-gate outputs with each other, as shown for gates 5 and 6 in FIG. 6. The OR-gates l3, l4 represented separately in FIG. 5 for the sake of clarity, are therefore actually part of the modified AND-gates 5 8 and 9 12 respectively.

The pulses passing through the OR-gates 13, 14 are then reshaped in the monostable multivibrators 15, 16 to form welldefined pulses. The multivibrator 15 generates the incrementing pulses for positive counting of reversible counter VRZ, the multivibrator 16 the decrementing pulses for negative counting. The transistor stage T indicated in FIG. 6 is part of such a multivibrator.

FIG. 5 shows also an anti-coincidence circuit 17. The latter prevents simultaneous transmission of an incrementing pulse from multivibrator 15 and a decrementing pulse, from multivibrator 16 caused by a change of direction of (t) close to a boundary 4),, to the counter VRZ. The counter VRZ thus has only to process those counting pulses which have a certain minimum time separation.

The common action of comparators C to C on the logic LG, and control of the counter VRZ by means of the latter thus has the effect that the correct multiple of 11' belonging to the corresponding partial range (ll, 12, 13, 14) etc. of FIG. 1

is always available in the counter VRZ. For example, the.

counter VRZ is within partial range 11 (reset position) at 1, corresponding to 17.

The sinusoidal generator SG can serve as a clock by forming corresponding clock pulses by means of a pulse shaper (e. g. Schmitt trigger) PF, FIG. 4, so that synchronization of the switching elements in LG and VRZ is possible. The multiples of 1r in the counter VRZ are converted to an analog voltage in a digital-analog converter D/A and added to the signals S, 3', C or G passing through the combination gate TX in the second adder A The gating circuit TK selects, as indicated above, (after identification of the correct partial range (11), (12), (13) or (14) according-to FIG. 1) only one of the quantities S,,,, C, or 6; according to the above represented relation 1 1, 12, 13 and and transmits it as undistorted as pomlble to the adder A The details of the gating circuit TK are shown more clearly in FIG. 7. It consists of the NAND-gates 19, 20, 21, 22, 23 and a NOR-gate 24, which are interconnected in the manner illustrated. To these gates are fed the signals S E, C,, a, and the signals V V V and V from the comparators C C and C in the manner shown in FIG. 7. The circuit operates according to the following rules:

control signals range transmitted signal V =l,V ,=0,V =O (11) S, V l (12) C, V,=O,V,,=O,V =O (13) i V, l (14) C,

The details of the circuits represented in FIGS. 4, 5, 6, 7 for carrying out the method according to the invention can be modified, for example, so that not only one of the two input channels is compared with the (e.g. voltages l {272 and I 2/2 by means of C,, and C,,, but both input channels are compared with the above-mentioned constant voltages. To this end, two additional comparators are required. With the additional signals obtained from these comparators one can simplify the logic LG and the gating circuit TK illustrated in FIGS. 5, 6, 7. But this circuit configuration is less advantageous than the preferred one illustrated in the figures, if the transducer characteristics cosd) and sind) are not ideal (e.g. having quadrature errors), since in this case ambiguities can arise more easily when a range limit 11 is passed. Since at least minor errors are unavoidable in practice, the circuits illustrated in FIGS. 5, 6, 7 is generally preferred.

In order to take into account the constant factor a) [see equations (ll), (l2), (13), (14)], the output of the digital/analog converter D/A is adapted to the output of the gating circuit TK. The output signal of the gating circuit TK is a pulse-width modulated signal with normalized amplitude. In reset position, O), the output signal of the gating circuit TK, integrated over a period T, yields half of the normalized amplitude. The output signal of the digital-analog converter is so adjusted that a variation of the counter reading of the counter VRZ by one unit causes a variation of the analog output of the converter D/A by half the normalized amplitude. The output signals of the converter D/A and of the gating circuit TK thus defined are then added in the second adder A The pulsewidth-modulated summation signal is then averaged in a lowpass filter TP.

In reset position (4: counter VRZ is at -l. The output signal of the converter D/A is then normalized amplitude. The output of the gating circuit TK compensates in this state the mean value at the output of the lowpass filter TP to OV. The signal at the output of the lowpass filter TP then corresponds with (t). It can be measured and displayed by an indicator instrument DP, such for example, as an oscillograph, or oscilloscope.

Delays in switching, for example, from S to C (da n/4) result in no additional errors, since both functions yield the same result, provided that counter VRZ can follow correctly.

Compared to the known measuring systems, particularly that disclosed in Swiss Pat. No. 433,065 for high voltage transmission lines, the method according to the present invention, and the circuits disclosed for carrying out this method have the advantages, among others, that no multipliers are used and the resolution is so high that even minute intensity differences of the light beams detected by the photosensors can be measured accurately.

Obviously, numerous modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described herein.

What is claimed as new and desired to be secured by Letters Patent of the United States is:

1. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, comprising the steps of:

developing a first output signal using said transducer; generating a reference voltage having an angular frequency which is sufiiciently high so that said first output signal remains substantially constant during one cycle of said reference voltage, and having an amplitude equal to the maximum amplitude of said first output signal, comparing said first output signal with said reference voltage for determining points in time during each half cycle of said reference voltage at which said first output signal and said reference voltage are of equal amplitude; and,

electronically producing a first pulse having a width proportional to a time interval defined by said points in time at which said first output signal and said reference voltage are of equal amplitude, whereby said first pulse is proportional to an instantaneous value of said argument. 2. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 1, further comprising the steps of:

developing a second output signal, shifted in phase by 1112 with respect to said first signal, using said transducer;

comparing said second output signal with said reference voltage for determining points of time during each half cycle of said reference voltage at which said first output signal and said reference voltage are of equal magnitude; and,

electronically producing a second pulse having a width pro- 7 3. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 2, further comprising the step of:

comparing said first and second pulses to determine which has a smaller absolute value; and,

electronically selecting whichever of said pulses has a smaller absolute value for representing an instantaneous value of said argument.

4. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 3, further comprising the step of:

generating pulses which are the logical complements of said first and second pulses.

5. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 4, wherein:

said step of generating pulses includes the step of normalizing the amplitudes of said pulses.

6. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 4, further comprising the steps of:

electronically sensing whether said transducer output signals are increasing or decreasing for increasing values of said argument; and,

selecting either said first and second pulses or said pulses which are the logical complements of said first and second pulses for instantaneous representation of said argument depending on whether said transducer output signals are increasing or decreasing.

7. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 6, further comprising the step of:

recording a count of appropriate sign in a reversible counter in response to said step of selecting.

8. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 7, further comprising the step of:

controlling said reversible counter in response to a comparison of output signals from said transducer with selected constant voltages.

9. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, comprising:

means for generating a reference voltage, said reference voltage having a frequency which is sufficiently high so that said transducer output signal remains substantially constant during one cycle of said reference voltage and having an amplitude equal to the maximum amplitude of said transducer output signal;

first comparator means having a plurality of input terminals,

said reference voltage and said transducer output signal applied to said input terminals;

said comparator means generating output pulses representing instants of equal but changing amplitude in said signals applied at said input terminals;

low-pass filter means coupled to said first comparator means for filtering said output pulses thereof, whereby a signal representative of said argument is produced; and, utilization means coupled to said low-pass filter means for utilizing output signals thereof.

10. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 9, further comprising:

second comparator means for generating output pulses which are logical complements of said output pulses generated by said first comparator means; and, controlling logic coupled between said first and second comparator means and said utilization means for selectively transmitting said output pulses of either said first or second comparator means to said utilization means.

11. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 10, wherein:

said controlling logic means includes third comparator means for comparing said transducer output signal with a plurality of constant voltage levels.

12. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 11, further comprising:

reversible counter means coupled to said controlling logic;

digital-to-analog converter means coupled to the output of said reversible counter means for converting the output of said reversible counter means to an analog voltage; and,

adder means coupled to said digital-to-analog converter for combining the output of said digital-to-analog converter with output pulses selectively transmitted by said controlling logic. 13. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 12, further comprising:

pulse shaper means coupled to said reference voltage generating means for producing clock pulses; said pulse shaper means coupled to said controlling logic and to said reversible counter means for synchronizing said controlling logic and said reversible counter means.

InrnA: n.

I UNITED STATES PATENT OFFICE g I "CERTIFICATE OF CORRECTION PatentNo- I 3,678.399' Dated July 18, :1972

Inventor( FRANCOIS MOTTIER ET AL It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

Column 1, 1ine9, change "electrically" to electronically; Line 20, after "argumenfllnsert function-; Line 22, after "forrn", change the", to

:Line 24, change both instances, to

Line 33, after --l, 103", insert Line 39, delete "require and insert therefor "have"; H Line 40, delete "have" and insert therefor requlre-+; "Line 66, delete "according tothe invention in that";

' L1ne'75, change "generated" to generate.

' Column 2, line 2, change "or' to --of--;

- Line 3, before "transducer" insert the;

- Line l, change "The" to -These-;

. Line 29, change "91) to "00";

FORM PO-lOSO (10-69) USCOMM-DC 60376-F'69 u.s, GOVERNMENT PRINTING OFFICE: [969 'o-see-au,

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent-No. 7 v Dated Jug 18, 1972 lnventoaa FRANCOIS MOTTIER E AL PAGE 2 It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

7. Line 60, before "signals" insert -output--, after "(t)",

last instance, and before 11-", insert Line 67, change formula to read -sin( /2 n T Column line 4L, after the equation, arid -(3)-; .Line 6, after theequation, add -(4);

Line 32, after "expressed", add in*;

Line 33, after "mathematically", insert Line {L5, delete "discussed" and insert therefor pro cessed-, delete "the reference";

Line 46, after "of"; insert-the reference Line49, after "while", insertfor-; Line 56, change "values" to value Linc 62., delete and inserttherefor More specifically,

cither;

F ORM PO-IOSO (10-69) ,USCOMM-DC 60376-P69 1% us. sovznmazm' PRINTING OFFICE: was o-ass-au.

I 9 v UNITED STATES I PATENT OFFICE CERTIFICATE OF CORRECTION Patent NO; 3,678,399 Dated Ju1y 18, 1972 Inventofls) FRANCOIS MOTTIER ET .AL PAGE 3 It is certified that error ap'pears in the .ab0ve-identified patent and that said Letters Patent are hereby corrected as shown below:

Line "63, after "characteristic", insert ---is-used, une 70; after "/4", insert and the falliug leg 5 cos in region 12 between I4 and -3TT/4;

Line74; after Cpg", insert a Line 75, before"' /2", delete after /Z'fidelete can thus be used".

Column 4, line 13, after "Then", insert' I Line 14, delete frorn around "2 /w Line. 16, before first comparator", add -FIG. 4, --a-,

after "Q insert d I Line 17, change "equation" to equations' I Line 18, before signal", insert -bir1ary, cha g "com plements" to -corr1p1emer 1t I Line 21, before C and c' insert "signals- Equation (11), change "Sdt'f to -dt-;

Equation (14), change -"Cdt to 'Cdt--;

' Column 5, line 3, after "FIG 4", delete "a and insert FORM FO-105O (10-69) USCOMM-DC 6Q376'-P69 tr u,s. GOVERNMENT PRINTING OFFICE: I969 0-3ss-s34,

: UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION a e N z 678 I zqq Dated July 18 1972 v Inventor( s) FRANCOIS MOTTIER ET AL I PAGE 4 I It is certified that error appears in the above-identified patent and that said Letters Patent are-hereby corrected as shownbelow:

Line 7, after "E", insert and "C delete "or" and insert -Line 11, between C therefor and-E;

Line 13, after WC-'7, insert Line 25, before 1", second instance, delete", and insert after 1" second instance;

Line 30, change "N" t Line 32, after "5 7 /4" change toi- Line ge "C 'tfirst instance, to -C I Line 34, change '.'N' to n 7 Line 54, after "V2", insert ,"Line 60, delete "form" and inserttherefor --from Column 6, line 3, after "V delete "1"} I Line 37, de1ete-" W and insert therefor TI :ORM PO-1050 (10-69) USCOMM-DC 60376-P6Q s u. s GOVERNMENT PRINTING OFFICE: I969 0-366-334. v

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent 1 678 ,399 Q Dated Julv 18 1972 inventor(s) FRANCOIS MOTTIER ET AL' v PAGE 5 It is certified that error appears in the above-identified patent I and that said Letters Patentare hereby corrected as shown below:

Line 51 should read l4 Line 53, before "NAND-gmtes", del e "the" Line 67, delete (e. g. and insert therefor "constant";

Column ,7, line 18, before"counter", delete Line 24, after such insert ,Line 26, change "S" to (SEAL) Attest:

EDWARD M.FLETCHER,JR. ROBERT GOTTSCHALK Attesting Officer Commissioner of Patents FORM 1 0-1050 (10-69) USCOMM-DC 60376-P69 s Us. GOVERNMENT PRINTING OFFICE: 1959 o-v-ass-au, 

1. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, comprising the steps of: developing a first output signal using said transducer; generating a reference voltage having an angular frequency which is sufficiently high so that said first output signal remains substantially constant during one cycle of said reference voltage, and having an amplitude equal to the maximum amplitude of said first output signal, comparing said first output signal with said reference voltage for determining points in time during each half cycle of said reference voltage at which said first output signal and said reference voltage are of equal amplitude; and, electronically producing a first pulse having a width proportional to a time interval defined by said points in time at which said first output signal and said reference voltage are of equAl amplitude, whereby said first pulse is proportional to an instantaneous value of said argument.
 2. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 1, further comprising the steps of: developing a second output signal, shifted in phase by pi /2 with respect to said first signal, using said transducer; comparing said second output signal with said reference voltage for determining points of time during each half cycle of said reference voltage at which said first output signal and said reference voltage are of equal magnitude; and, electronically producing a second pulse having a width proportional to a time interval defined by points in time at which said second output signal and said reference voltage are of equal amplitude.
 3. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 2, further comprising the step of: comparing said first and second pulses to determine which has a smaller absolute value; and, electronically selecting whichever of said pulses has a smaller absolute value for representing an instantaneous value of said argument.
 4. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 3, further comprising the step of: generating pulses which are the logical complements of said first and second pulses.
 5. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, as in claim 4, wherein: said step of generating pulses includes the step of normalizing the amplitudes of said pulses.
 6. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 4, further comprising the steps of: electronically sensing whether said transducer output signals are increasing or decreasing for increasing values of said argument; and, selecting either said first and second pulses or said pulses which are the logical complements of said first and second pulses for instantaneous representation of said argument depending on whether said transducer output signals are increasing or decreasing.
 7. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 6, further comprising the step of: recording a count of appropriate sign in a reversible counter in response to said step of selecting.
 8. A method for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, according to claim 7, further comprising the step of: controlling said reversible counter in response to a comparison of output signals from said transducer with selected constant voltages.
 9. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic, comprising: means for generating a reference voltage, said reference voltage having a frequency which is sufficiently high so that said transducer output signal remains substantially constant during one cycle of said reference voltage and having an amplitude equal to the maximum amplitude of said transducer output signal; first comparator means having a plurality of input terminals, said reference voltage and said transducer output signal applied to said input terminals; said comparator means generating output pulses representing instants of equal but changing amplitude in said signals applied at said input terminals; low-pass filter means coupled to said first comparator means for filtering said output pulses thereof, whereby a signal representative of said argumeNt is produced; and, utilization means coupled to said low-pass filter means for utilizing output signals thereof.
 10. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 9, further comprising: second comparator means for generating output pulses which are logical complements of said output pulses generated by said first comparator means; and, controlling logic coupled between said first and second comparator means and said utilization means for selectively transmitting said output pulses of either said first or second comparator means to said utilization means.
 11. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 10, wherein: said controlling logic means includes third comparator means for comparing said transducer output signal with a plurality of constant voltage levels.
 12. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 11, further comprising: reversible counter means coupled to said controlling logic; digital-to-analog converter means coupled to the output of said reversible counter means for converting the output of said reversible counter means to an analog voltage; and, adder means coupled to said digital-to-analog converter for combining the output of said digital-to-analog converter with output pulses selectively transmitted by said controlling logic.
 13. A logic network for electronically obtaining the argument of an output signal generated by a transducer having a sinusoidal transfer characteristic as in claim 12, further comprising: pulse shaper means coupled to said reference voltage generating means for producing clock pulses; said pulse shaper means coupled to said controlling logic and to said reversible counter means for synchronizing said controlling logic and said reversible counter means. 